1. Field of the Invention
This disclosure is related to the field of computer systems, and more particularly to systems and methods for re-mapping memory transactions.
2. Description of the Related Art
Some computers feature memory access mechanisms that allow hardware subsystems or input/output (I/O) peripherals to access system memory without direct interaction with a central processing unit (CPU) or processor. As a result, memory transactions involving these peripherals may take place while the processor continues to perform other tasks, thus increasing overall system efficiency. The use of such memory access mechanisms, however, also presents the so-called “coherency problem.”
For example, in some situations, a processor may be equipped with a cache memory (e.g., L2 cache) and/or an external memory that may be accessed directly by peripherals. When the processor accesses a location in the external memory, its current value is stored in the cache. Ordinarily, subsequent operations upon that value would be stored in the cache but not in the external memory. Therefore, if a peripheral attempts to read the value from the external memory, it may receive an “old” or “stale” value. To avoid this situation, coherency may be maintained between values stored in cache and the external memory, such that cache values are copied to the external memory before the peripheral tries to access them.
Coherency techniques may be implemented via hardware or software. In the case of hardware, a control unit may receive a request from a peripheral and then perform one or more operations that attempt to ensure coherency between the cache and the external memory. Typically, a peripheral issues a memory request to the control unit, which in turn determines whether the request may be satisfied from cache. If the request cannot be satisfied from cache, then the control unit forwards the memory request to the external memory. The control unit may also arbitrate the return of a response from the external memory to the peripheral. In order for the system to keep track of which request and response were received from which originating peripheral, each such transaction may contain some type of identification information.